From zero to a neuromorphic lab
Zero programming experience, one accelerator and the decision to learn by building.
Day 1 — the first evening with AKD1500
From PCIe enumeration to a first repeatable inference loop.
Days 2 + 3 — the chip gets a pair of eyes
The moment a clean accelerator demo became a real computer-vision problem.
Day 4 — finding hidden objects
PCIe root cause, endurance run, second look and the first software-like behaviours.
Day 5 — the Pi knows where; Akida knows what
The architectural split that still defines the system today.
AKD1500: a recognition architecture for a 32-NP chip
From a dedicated detector to explainable overlap handling and the debugging lessons behind it.
The historical chronicle is kept separate from the current engineering notes. Current measurements, reproducible demos and VORSA-M3 mapping results remain in the technical deep dives and documentation.
Running four AKD1500 accelerators on a Raspberry Pi 5
A real DMA failure became the multi-card recovery design.
Why segmentation was harder than the neural network
The expensive vision failures were often upstream of inference.
The conveyor state machine and why “flow” beat “single-shot”
The line became a machine when failure states became explicit.
On-chip learning in about 2 ms
What the productive prototype path actually learns and what the timing means.
Thirteen expensive lessons from building the machine
The failures that became permanent engineering rules.
Two numpy worlds on one Raspberry Pi
The dependency fix was a process boundary, not more pin juggling.
Making the Akida PCIe driver build on kernel 6.12
The official baseline needed two reproducible project patches on this Pi 5.
Designing VORSA-M3 for one hardware pass
The mapper shaped the detector before accuracy charts did.
Why we stopped chasing YOLO
A roughly 72-NP path did not fit a 32-NP target.